1. Field of the Invention
The present invention relates to a method of programming a memory cell, and more particularly, to a method of programming a memory cell capable of adjusting voltages automatically.
2. Description of Related Art
Among various types of memory products, the non-volatile memory allows multiple data writing, reading, and erasing operations. One non-volatile memory is a memory that has widely used in personal computers and electronic equipments. In one non-volatile memory, data can be stored, read out or erased numerous times and any stored data can be retained even after power is cut off.
The typical non-volatile memory cell has a floating gate and a control gate made by doped polysilicon. The floating gate disposed between the control gate and the substrate is in a floating state and is not electrically connected to any devices for storing charges. The control gate is used to control the data writing/reading function. Therefore, one non-volatile memory cell can store either “1” or “0” and is a single-bit (1 bit/cell memory cell) memory cell.
With the increase in the integrity of integrated circuit devices, a non-volatile memory cell adopting nitride silicon to fabricate a charge trapping layer as a replacement of a polysilicon floating gate is provided. Please refer to FIGS. 1A and 1B which are schematic views illustrating a programming operation on a conventional 2 bits/cell non-volatile memory cell. First, a memory cell is provided. The memory cell includes a substrate 102, a source 104, a drain 106, an oxide layer 108, a nitride layer 110, another oxide layer 112, and a polysilicon layer 114. The method of a programming operation of the memory cell is that 10 volts of voltage is applied to the polysilicon layer 114, 0 volt is applied to the source 104, 5˜7 volts is applied to the drain 106, and 0 volt is applied to the substrate 102, such that hot electrons generated in a channel region are injected into the nitride layer 110 adjacent to a side of the drain 106 so as to store a bit 116. Thereafter, the voltages of the drain 106 and the source 104 are reversely connected, such that the hot electrons generated in the channel region are injected into the nitride layer 110 adjacent to a side of the source 104 for storing a bit 118. The memory cell is a non-volatile memory cell storing 2 bits in one cell (2 bits/cell).
Nevertheless, during the programming operation performed on a conventional 2 bits/cell non-volatile memory cell, if a bit (a first bit) is stored near the drain of the memory cell, the storage of another bit (a second bit) enhances the programming efficiency and influences the performance of devices. Please refer to FIGS. 2A and 2B which are views illustrating a voltage distribution of the conventional 2 bits/cell non-volatile memory cell. The reference number 210 in FIG. 2A refers to a programming threshold voltage (Vt) distribution curve when a storage operation is performed on the bit 116. The reference number 220 in FIG. 2B refers to the programming Vt distribution curve when the storage operation is performed on the bit 118. It can be learned from FIGS. 2A and 2B that during the programming operation performed on the memory cell, the existing bit 116 (the first bit) affects the programming efficiency of another bit 118 (the second bit), leading to an increase in the Vt and a looser Vt distribution curve (as a width labeled as 230 in FIG. 2B). This is the so-called over-programming.
The cross interference of two bits in one memory cell mentioned above may substantially implicate the device operation and even deteriorate the device reliability. Therefore, how to resolve the above issue has become an important topic in the industry.